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SAR ADC DAC Question

Weird samples from SAR ADCInherent sample and hold in a comparator?SAR vs. Delta-Sigma ADCADC SAR missing codesOutput impedance of the current output DACDAC to ADC errorsHow does the Zoom ADC exactly zoom in (Practically)?String DAC - Question

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2

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Hi,
This is an extract from MT-021 from Analog Devices about SAR ADCs. In particular, it shows a circuit in which the Track(Sample) and Hold block of the SAR architecture AND the DAC of the SAR architecture are implemented as one.

My question is : The description/circuit is explaining about the operation of the DAC but if you read the highlighted sentance, it says "The comparator then makes the MSB bit decision". If this is operating as DAC, why do we need to make an MSB bit decision, shouldn't we already know the bits if it's a digital to analog converter?

https://www.analog.com/media/en/training-seminars/tutorials/MT-021.pdf

adc dac data

share|improve this question

asked 8 hours ago

AlfroJang80AlfroJang80

85166 silver badges1616 bronze badges

$endgroup$

add a comment
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2

$begingroup$

Hi,
This is an extract from MT-021 from Analog Devices about SAR ADCs. In particular, it shows a circuit in which the Track(Sample) and Hold block of the SAR architecture AND the DAC of the SAR architecture are implemented as one.

My question is : The description/circuit is explaining about the operation of the DAC but if you read the highlighted sentance, it says "The comparator then makes the MSB bit decision". If this is operating as DAC, why do we need to make an MSB bit decision, shouldn't we already know the bits if it's a digital to analog converter?

https://www.analog.com/media/en/training-seminars/tutorials/MT-021.pdf

adc dac data

share|improve this question

asked 8 hours ago

AlfroJang80AlfroJang80

85166 silver badges1616 bronze badges

$endgroup$

add a comment
 | 

$begingroup$

Hi,
This is an extract from MT-021 from Analog Devices about SAR ADCs. In particular, it shows a circuit in which the Track(Sample) and Hold block of the SAR architecture AND the DAC of the SAR architecture are implemented as one.

My question is : The description/circuit is explaining about the operation of the DAC but if you read the highlighted sentance, it says "The comparator then makes the MSB bit decision". If this is operating as DAC, why do we need to make an MSB bit decision, shouldn't we already know the bits if it's a digital to analog converter?

https://www.analog.com/media/en/training-seminars/tutorials/MT-021.pdf

adc dac data

share|improve this question

asked 8 hours ago

AlfroJang80AlfroJang80

85166 silver badges1616 bronze badges

$endgroup$

share|improve this question

asked 8 hours ago

AlfroJang80AlfroJang80

85166 silver badges1616 bronze badges

share|improve this question

asked 8 hours ago

AlfroJang80AlfroJang80

85166 silver badges1616 bronze badges

asked 8 hours ago

AlfroJang80AlfroJang80

85166 silver badges1616 bronze badges

asked 8 hours ago

AlfroJang80AlfroJang80

85166 silver badges1616 bronze badges

1 Answer
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4

$begingroup$

If a DAC is used as part of a SAR ADC, then we don't already know the value of the MSB. The logic in the ADC makes an assumption about the value of the MSB, uses the DAC to create an analog voltage corresponding to that assumption, and then the comparator determines whether the actual input voltage is higher or lower than the DAC output. At that point, the SAR logic (of which the comparator is a part) makes the decision about whether the MSB should be high or low. The wording of the sentence you quote could be improved a bit, but in the context of SAR ADCs it is pretty obvious.

share|improve this answer

answered 8 hours ago

Elliot AldersonElliot Alderson

12.4k22 gold badges1212 silver badges2525 bronze badges

$endgroup$

• 
  
  
  

  
  

  
  
  
  
  
  

  
  $begingroup$
  Ah I see. So when they say "The comparator then makes the MSB decision", this is the next iteration (or first) of digital values as part of the SAR iterative process.
  $endgroup$
  – AlfroJang80
  8 hours ago
  
  

  
  
  
  


• 
  
  
  

  
  

  
  
  
  
  
  

  
  $begingroup$
  Actually, may I ask, what's the point of the SAR register if the current digital code is being stored on the capacitors themselves? Or is it used to drive the switch inputs in the above circuit?
  $endgroup$
  – AlfroJang80
  7 hours ago
  
  

  
  
  
  


• 
  
  
  

  
  

  
  
  
  
  
  

  
  $begingroup$
  Yes, the digital code is being used to control the switches. Eventually that code will be the output of the ADC so you want it to be in the form of normal logic signals that are easy to read.
  $endgroup$
  – Elliot Alderson
  6 hours ago
  

  
  
  
  

add a comment
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4

$begingroup$

If a DAC is used as part of a SAR ADC, then we don't already know the value of the MSB. The logic in the ADC makes an assumption about the value of the MSB, uses the DAC to create an analog voltage corresponding to that assumption, and then the comparator determines whether the actual input voltage is higher or lower than the DAC output. At that point, the SAR logic (of which the comparator is a part) makes the decision about whether the MSB should be high or low. The wording of the sentence you quote could be improved a bit, but in the context of SAR ADCs it is pretty obvious.

share|improve this answer

answered 8 hours ago

Elliot AldersonElliot Alderson

12.4k22 gold badges1212 silver badges2525 bronze badges

$endgroup$

• 
  
  
  

  
  

  
  
  
  
  
  

  
  $begingroup$
  Ah I see. So when they say "The comparator then makes the MSB decision", this is the next iteration (or first) of digital values as part of the SAR iterative process.
  $endgroup$
  – AlfroJang80
  8 hours ago
  
  

  
  
  
  


• 
  
  
  

  
  

  
  
  
  
  
  

  
  $begingroup$
  Actually, may I ask, what's the point of the SAR register if the current digital code is being stored on the capacitors themselves? Or is it used to drive the switch inputs in the above circuit?
  $endgroup$
  – AlfroJang80
  7 hours ago
  
  

  
  
  
  


• 
  
  
  

  
  

  
  
  
  
  
  

  
  $begingroup$
  Yes, the digital code is being used to control the switches. Eventually that code will be the output of the ADC so you want it to be in the form of normal logic signals that are easy to read.
  $endgroup$
  – Elliot Alderson
  6 hours ago
  

  
  
  
  

add a comment
 | 

4

$begingroup$

If a DAC is used as part of a SAR ADC, then we don't already know the value of the MSB. The logic in the ADC makes an assumption about the value of the MSB, uses the DAC to create an analog voltage corresponding to that assumption, and then the comparator determines whether the actual input voltage is higher or lower than the DAC output. At that point, the SAR logic (of which the comparator is a part) makes the decision about whether the MSB should be high or low. The wording of the sentence you quote could be improved a bit, but in the context of SAR ADCs it is pretty obvious.

share|improve this answer

answered 8 hours ago

Elliot AldersonElliot Alderson

12.4k22 gold badges1212 silver badges2525 bronze badges

$endgroup$

• 
  
  
  

  
  

  
  
  
  
  
  

  
  $begingroup$
  Ah I see. So when they say "The comparator then makes the MSB decision", this is the next iteration (or first) of digital values as part of the SAR iterative process.
  $endgroup$
  – AlfroJang80
  8 hours ago
  
  

  
  
  
  


• 
  
  
  

  
  

  
  
  
  
  
  

  
  $begingroup$
  Actually, may I ask, what's the point of the SAR register if the current digital code is being stored on the capacitors themselves? Or is it used to drive the switch inputs in the above circuit?
  $endgroup$
  – AlfroJang80
  7 hours ago
  
  

  
  
  
  


• 
  
  
  

  
  

  
  
  
  
  
  

  
  $begingroup$
  Yes, the digital code is being used to control the switches. Eventually that code will be the output of the ADC so you want it to be in the form of normal logic signals that are easy to read.
  $endgroup$
  – Elliot Alderson
  6 hours ago
  

  
  
  
  

add a comment
 | 

$begingroup$

If a DAC is used as part of a SAR ADC, then we don't already know the value of the MSB. The logic in the ADC makes an assumption about the value of the MSB, uses the DAC to create an analog voltage corresponding to that assumption, and then the comparator determines whether the actual input voltage is higher or lower than the DAC output. At that point, the SAR logic (of which the comparator is a part) makes the decision about whether the MSB should be high or low. The wording of the sentence you quote could be improved a bit, but in the context of SAR ADCs it is pretty obvious.

share|improve this answer

answered 8 hours ago

Elliot AldersonElliot Alderson

12.4k22 gold badges1212 silver badges2525 bronze badges

$endgroup$

share|improve this answer

answered 8 hours ago

Elliot AldersonElliot Alderson

12.4k22 gold badges1212 silver badges2525 bronze badges

answered 8 hours ago

Elliot AldersonElliot Alderson

12.4k22 gold badges1212 silver badges2525 bronze badges

answered 8 hours ago

Elliot AldersonElliot Alderson

12.4k22 gold badges1212 silver badges2525 bronze badges