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How does Rust's 128-bit integer `i128` work on a 64-bit system?
Is there hardware support for 128bit integers in modern processors?How can I use a custom type for keys in a boost::unordered_map?How to convert a decimal ascii string to integer array in C?An efficient way to do basic 128 bit integer calculations in C++?Why does Rust bother with “let”?Chaining checked arithmetic operations in Rust__int128 supported by emscripten? If not, how to implement 128 bit int multiplication?How do I evaluate expressions in Rust's macro system?Why does a generic function replicating C's fread for unsigned integers always return zero?How can I implement the From trait for all types implementing a trait but use a specific implementation for certain types?Reading UINT 128 from Node JS Buffer
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Rust has 128-bit integers, denoted with the datatype i128
(and u128
for unsigned ints):
let a: i128 = 170141183460469231731687303715884105727;
How does Rust make these i128
values work on a 64-bit OS? How does it do arithmetic on these? Since, as far as I know, the value cannot fit in one register of a x86-64 CPU. Does the compiler somehow use 2 registers for one i128
value, or are they using some kind of big integer struct to represent them?
rust int128 llvm-codegen
add a comment |
Rust has 128-bit integers, denoted with the datatype i128
(and u128
for unsigned ints):
let a: i128 = 170141183460469231731687303715884105727;
How does Rust make these i128
values work on a 64-bit OS? How does it do arithmetic on these? Since, as far as I know, the value cannot fit in one register of a x86-64 CPU. Does the compiler somehow use 2 registers for one i128
value, or are they using some kind of big integer struct to represent them?
rust int128 llvm-codegen
add a comment |
Rust has 128-bit integers, denoted with the datatype i128
(and u128
for unsigned ints):
let a: i128 = 170141183460469231731687303715884105727;
How does Rust make these i128
values work on a 64-bit OS? How does it do arithmetic on these? Since, as far as I know, the value cannot fit in one register of a x86-64 CPU. Does the compiler somehow use 2 registers for one i128
value, or are they using some kind of big integer struct to represent them?
rust int128 llvm-codegen
Rust has 128-bit integers, denoted with the datatype i128
(and u128
for unsigned ints):
let a: i128 = 170141183460469231731687303715884105727;
How does Rust make these i128
values work on a 64-bit OS? How does it do arithmetic on these? Since, as far as I know, the value cannot fit in one register of a x86-64 CPU. Does the compiler somehow use 2 registers for one i128
value, or are they using some kind of big integer struct to represent them?
rust int128 llvm-codegen
rust int128 llvm-codegen
edited 7 hours ago
Lukas Kalbertodt
29.4k4 gold badges75 silver badges140 bronze badges
29.4k4 gold badges75 silver badges140 bronze badges
asked 9 hours ago
ruoholaruohola
5,7013 gold badges10 silver badges38 bronze badges
5,7013 gold badges10 silver badges38 bronze badges
add a comment |
add a comment |
3 Answers
3
active
oldest
votes
All Rust's integer types are compiled to LLVM integers. The LLVM abstract machine allows integers of any bit width from 1 to 2^23 - 1.* LLVM instructions typically work on integers of any size.
Obviously, there aren't many 8388607-bit architectures out there, so when the code is compiled to native machine code, LLVM has to decide how to implement it. The semantics of an abstract instruction like add
are defined by LLVM. Typically, instructions that have a single-instruction equivalent in native code will be compiled to that instruction, while those that don't will be emulated, possibly with multiple instructions. mcarton's answer demonstrates both native and emulated instructions.
(This doesn't only apply to integers that are larger than the native machine can support, but also to those that are smaller. For example, modern architectures might not support native 8-bit arithmetic, so an add
instruction on two i8
s may be emulated with a wider instruction, the extra bits discarded.)
Does the compiler somehow use 2 registers for one i128 value? Or are they using some kind of big integer struct to represent them?
At the level of LLVM IR, the answer is neither: i128
fits in a single register, just like every other single-valued type. On the other hand, once translated to machine code, there isn't really a difference between the two, because structs may be decomposed into registers just like integers. When doing arithmetic, though, loading the whole thing into two registers is a pretty safe bet.
* Although I understand that support for sizes larger than 128 and non-powers of two is spotty and the implementation may have bugs, which may partly explain why Rust only exposes 1-, 8-, 16-, 32-, 64-, and 128-bit integers.
add a comment |
The compiler will store these in multiple registers and use multiple instructions to do arithmetic on those values if needed. For example, given
fn main()
let a = 42u128;
let b = a + 1337;
the compiler generates:
playground::main:
sub rsp, 56
mov qword ptr [rsp + 32], 0
mov qword ptr [rsp + 24], 42
mov rax, qword ptr [rsp + 24]
mov rcx, qword ptr [rsp + 32]
add rax, 1337
adc rcx, 0
setb dl
mov rsi, rax
test dl, 1
mov qword ptr [rsp + 16], rax
mov qword ptr [rsp + 8], rsi
mov qword ptr [rsp], rcx
jne .LBB8_2
mov rax, qword ptr [rsp + 16]
mov qword ptr [rsp + 40], rax
mov rcx, qword ptr [rsp]
mov qword ptr [rsp + 48], rcx
add rsp, 56
ret
where you can see that the value 42
is stored in rax
and rcx
. For comparison, here is the simpler 64 bits variant:
playground::main:
sub rsp, 24
mov qword ptr [rsp + 8], 42
mov rax, qword ptr [rsp + 8]
add rax, 1337
setb cl
test cl, 1
mov qword ptr [rsp], rax
jne .LBB8_2
mov rax, qword ptr [rsp]
mov qword ptr [rsp + 16], rax
add rsp, 24
ret
add a comment |
64 bit in a 64 bit architecture refers to the length of address
to the actual position in memory.
128 bit in in the i128 type refers to the size of the data
which is stored at the location
3
Okay, so how would one divide this number by 2, for example? 64-bit computers can only divide 64-, 32- and 16-bit numbers, if I'm not mistaken
– ForceBru
8 hours ago
1
@ForceBru There isn't any particular reason why a 32 or 64 bit system couldn't implement 128 bit addition in a single instruction. In fact, many architectures support it in a limited way - e.g. producing a 128 bit result from a 64 bit operation. See stackoverflow.com/a/34239917/493729.
– Peter Hall
6 hours ago
add a comment |
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3 Answers
3
active
oldest
votes
3 Answers
3
active
oldest
votes
active
oldest
votes
active
oldest
votes
All Rust's integer types are compiled to LLVM integers. The LLVM abstract machine allows integers of any bit width from 1 to 2^23 - 1.* LLVM instructions typically work on integers of any size.
Obviously, there aren't many 8388607-bit architectures out there, so when the code is compiled to native machine code, LLVM has to decide how to implement it. The semantics of an abstract instruction like add
are defined by LLVM. Typically, instructions that have a single-instruction equivalent in native code will be compiled to that instruction, while those that don't will be emulated, possibly with multiple instructions. mcarton's answer demonstrates both native and emulated instructions.
(This doesn't only apply to integers that are larger than the native machine can support, but also to those that are smaller. For example, modern architectures might not support native 8-bit arithmetic, so an add
instruction on two i8
s may be emulated with a wider instruction, the extra bits discarded.)
Does the compiler somehow use 2 registers for one i128 value? Or are they using some kind of big integer struct to represent them?
At the level of LLVM IR, the answer is neither: i128
fits in a single register, just like every other single-valued type. On the other hand, once translated to machine code, there isn't really a difference between the two, because structs may be decomposed into registers just like integers. When doing arithmetic, though, loading the whole thing into two registers is a pretty safe bet.
* Although I understand that support for sizes larger than 128 and non-powers of two is spotty and the implementation may have bugs, which may partly explain why Rust only exposes 1-, 8-, 16-, 32-, 64-, and 128-bit integers.
add a comment |
All Rust's integer types are compiled to LLVM integers. The LLVM abstract machine allows integers of any bit width from 1 to 2^23 - 1.* LLVM instructions typically work on integers of any size.
Obviously, there aren't many 8388607-bit architectures out there, so when the code is compiled to native machine code, LLVM has to decide how to implement it. The semantics of an abstract instruction like add
are defined by LLVM. Typically, instructions that have a single-instruction equivalent in native code will be compiled to that instruction, while those that don't will be emulated, possibly with multiple instructions. mcarton's answer demonstrates both native and emulated instructions.
(This doesn't only apply to integers that are larger than the native machine can support, but also to those that are smaller. For example, modern architectures might not support native 8-bit arithmetic, so an add
instruction on two i8
s may be emulated with a wider instruction, the extra bits discarded.)
Does the compiler somehow use 2 registers for one i128 value? Or are they using some kind of big integer struct to represent them?
At the level of LLVM IR, the answer is neither: i128
fits in a single register, just like every other single-valued type. On the other hand, once translated to machine code, there isn't really a difference between the two, because structs may be decomposed into registers just like integers. When doing arithmetic, though, loading the whole thing into two registers is a pretty safe bet.
* Although I understand that support for sizes larger than 128 and non-powers of two is spotty and the implementation may have bugs, which may partly explain why Rust only exposes 1-, 8-, 16-, 32-, 64-, and 128-bit integers.
add a comment |
All Rust's integer types are compiled to LLVM integers. The LLVM abstract machine allows integers of any bit width from 1 to 2^23 - 1.* LLVM instructions typically work on integers of any size.
Obviously, there aren't many 8388607-bit architectures out there, so when the code is compiled to native machine code, LLVM has to decide how to implement it. The semantics of an abstract instruction like add
are defined by LLVM. Typically, instructions that have a single-instruction equivalent in native code will be compiled to that instruction, while those that don't will be emulated, possibly with multiple instructions. mcarton's answer demonstrates both native and emulated instructions.
(This doesn't only apply to integers that are larger than the native machine can support, but also to those that are smaller. For example, modern architectures might not support native 8-bit arithmetic, so an add
instruction on two i8
s may be emulated with a wider instruction, the extra bits discarded.)
Does the compiler somehow use 2 registers for one i128 value? Or are they using some kind of big integer struct to represent them?
At the level of LLVM IR, the answer is neither: i128
fits in a single register, just like every other single-valued type. On the other hand, once translated to machine code, there isn't really a difference between the two, because structs may be decomposed into registers just like integers. When doing arithmetic, though, loading the whole thing into two registers is a pretty safe bet.
* Although I understand that support for sizes larger than 128 and non-powers of two is spotty and the implementation may have bugs, which may partly explain why Rust only exposes 1-, 8-, 16-, 32-, 64-, and 128-bit integers.
All Rust's integer types are compiled to LLVM integers. The LLVM abstract machine allows integers of any bit width from 1 to 2^23 - 1.* LLVM instructions typically work on integers of any size.
Obviously, there aren't many 8388607-bit architectures out there, so when the code is compiled to native machine code, LLVM has to decide how to implement it. The semantics of an abstract instruction like add
are defined by LLVM. Typically, instructions that have a single-instruction equivalent in native code will be compiled to that instruction, while those that don't will be emulated, possibly with multiple instructions. mcarton's answer demonstrates both native and emulated instructions.
(This doesn't only apply to integers that are larger than the native machine can support, but also to those that are smaller. For example, modern architectures might not support native 8-bit arithmetic, so an add
instruction on two i8
s may be emulated with a wider instruction, the extra bits discarded.)
Does the compiler somehow use 2 registers for one i128 value? Or are they using some kind of big integer struct to represent them?
At the level of LLVM IR, the answer is neither: i128
fits in a single register, just like every other single-valued type. On the other hand, once translated to machine code, there isn't really a difference between the two, because structs may be decomposed into registers just like integers. When doing arithmetic, though, loading the whole thing into two registers is a pretty safe bet.
* Although I understand that support for sizes larger than 128 and non-powers of two is spotty and the implementation may have bugs, which may partly explain why Rust only exposes 1-, 8-, 16-, 32-, 64-, and 128-bit integers.
edited 8 hours ago
answered 8 hours ago
trentcltrentcl
7,8833 gold badges20 silver badges39 bronze badges
7,8833 gold badges20 silver badges39 bronze badges
add a comment |
add a comment |
The compiler will store these in multiple registers and use multiple instructions to do arithmetic on those values if needed. For example, given
fn main()
let a = 42u128;
let b = a + 1337;
the compiler generates:
playground::main:
sub rsp, 56
mov qword ptr [rsp + 32], 0
mov qword ptr [rsp + 24], 42
mov rax, qword ptr [rsp + 24]
mov rcx, qword ptr [rsp + 32]
add rax, 1337
adc rcx, 0
setb dl
mov rsi, rax
test dl, 1
mov qword ptr [rsp + 16], rax
mov qword ptr [rsp + 8], rsi
mov qword ptr [rsp], rcx
jne .LBB8_2
mov rax, qword ptr [rsp + 16]
mov qword ptr [rsp + 40], rax
mov rcx, qword ptr [rsp]
mov qword ptr [rsp + 48], rcx
add rsp, 56
ret
where you can see that the value 42
is stored in rax
and rcx
. For comparison, here is the simpler 64 bits variant:
playground::main:
sub rsp, 24
mov qword ptr [rsp + 8], 42
mov rax, qword ptr [rsp + 8]
add rax, 1337
setb cl
test cl, 1
mov qword ptr [rsp], rax
jne .LBB8_2
mov rax, qword ptr [rsp]
mov qword ptr [rsp + 16], rax
add rsp, 24
ret
add a comment |
The compiler will store these in multiple registers and use multiple instructions to do arithmetic on those values if needed. For example, given
fn main()
let a = 42u128;
let b = a + 1337;
the compiler generates:
playground::main:
sub rsp, 56
mov qword ptr [rsp + 32], 0
mov qword ptr [rsp + 24], 42
mov rax, qword ptr [rsp + 24]
mov rcx, qword ptr [rsp + 32]
add rax, 1337
adc rcx, 0
setb dl
mov rsi, rax
test dl, 1
mov qword ptr [rsp + 16], rax
mov qword ptr [rsp + 8], rsi
mov qword ptr [rsp], rcx
jne .LBB8_2
mov rax, qword ptr [rsp + 16]
mov qword ptr [rsp + 40], rax
mov rcx, qword ptr [rsp]
mov qword ptr [rsp + 48], rcx
add rsp, 56
ret
where you can see that the value 42
is stored in rax
and rcx
. For comparison, here is the simpler 64 bits variant:
playground::main:
sub rsp, 24
mov qword ptr [rsp + 8], 42
mov rax, qword ptr [rsp + 8]
add rax, 1337
setb cl
test cl, 1
mov qword ptr [rsp], rax
jne .LBB8_2
mov rax, qword ptr [rsp]
mov qword ptr [rsp + 16], rax
add rsp, 24
ret
add a comment |
The compiler will store these in multiple registers and use multiple instructions to do arithmetic on those values if needed. For example, given
fn main()
let a = 42u128;
let b = a + 1337;
the compiler generates:
playground::main:
sub rsp, 56
mov qword ptr [rsp + 32], 0
mov qword ptr [rsp + 24], 42
mov rax, qword ptr [rsp + 24]
mov rcx, qword ptr [rsp + 32]
add rax, 1337
adc rcx, 0
setb dl
mov rsi, rax
test dl, 1
mov qword ptr [rsp + 16], rax
mov qword ptr [rsp + 8], rsi
mov qword ptr [rsp], rcx
jne .LBB8_2
mov rax, qword ptr [rsp + 16]
mov qword ptr [rsp + 40], rax
mov rcx, qword ptr [rsp]
mov qword ptr [rsp + 48], rcx
add rsp, 56
ret
where you can see that the value 42
is stored in rax
and rcx
. For comparison, here is the simpler 64 bits variant:
playground::main:
sub rsp, 24
mov qword ptr [rsp + 8], 42
mov rax, qword ptr [rsp + 8]
add rax, 1337
setb cl
test cl, 1
mov qword ptr [rsp], rax
jne .LBB8_2
mov rax, qword ptr [rsp]
mov qword ptr [rsp + 16], rax
add rsp, 24
ret
The compiler will store these in multiple registers and use multiple instructions to do arithmetic on those values if needed. For example, given
fn main()
let a = 42u128;
let b = a + 1337;
the compiler generates:
playground::main:
sub rsp, 56
mov qword ptr [rsp + 32], 0
mov qword ptr [rsp + 24], 42
mov rax, qword ptr [rsp + 24]
mov rcx, qword ptr [rsp + 32]
add rax, 1337
adc rcx, 0
setb dl
mov rsi, rax
test dl, 1
mov qword ptr [rsp + 16], rax
mov qword ptr [rsp + 8], rsi
mov qword ptr [rsp], rcx
jne .LBB8_2
mov rax, qword ptr [rsp + 16]
mov qword ptr [rsp + 40], rax
mov rcx, qword ptr [rsp]
mov qword ptr [rsp + 48], rcx
add rsp, 56
ret
where you can see that the value 42
is stored in rax
and rcx
. For comparison, here is the simpler 64 bits variant:
playground::main:
sub rsp, 24
mov qword ptr [rsp + 8], 42
mov rax, qword ptr [rsp + 8]
add rax, 1337
setb cl
test cl, 1
mov qword ptr [rsp], rax
jne .LBB8_2
mov rax, qword ptr [rsp]
mov qword ptr [rsp + 16], rax
add rsp, 24
ret
answered 8 hours ago
mcartonmcarton
9,1692 gold badges27 silver badges38 bronze badges
9,1692 gold badges27 silver badges38 bronze badges
add a comment |
add a comment |
64 bit in a 64 bit architecture refers to the length of address
to the actual position in memory.
128 bit in in the i128 type refers to the size of the data
which is stored at the location
3
Okay, so how would one divide this number by 2, for example? 64-bit computers can only divide 64-, 32- and 16-bit numbers, if I'm not mistaken
– ForceBru
8 hours ago
1
@ForceBru There isn't any particular reason why a 32 or 64 bit system couldn't implement 128 bit addition in a single instruction. In fact, many architectures support it in a limited way - e.g. producing a 128 bit result from a 64 bit operation. See stackoverflow.com/a/34239917/493729.
– Peter Hall
6 hours ago
add a comment |
64 bit in a 64 bit architecture refers to the length of address
to the actual position in memory.
128 bit in in the i128 type refers to the size of the data
which is stored at the location
3
Okay, so how would one divide this number by 2, for example? 64-bit computers can only divide 64-, 32- and 16-bit numbers, if I'm not mistaken
– ForceBru
8 hours ago
1
@ForceBru There isn't any particular reason why a 32 or 64 bit system couldn't implement 128 bit addition in a single instruction. In fact, many architectures support it in a limited way - e.g. producing a 128 bit result from a 64 bit operation. See stackoverflow.com/a/34239917/493729.
– Peter Hall
6 hours ago
add a comment |
64 bit in a 64 bit architecture refers to the length of address
to the actual position in memory.
128 bit in in the i128 type refers to the size of the data
which is stored at the location
64 bit in a 64 bit architecture refers to the length of address
to the actual position in memory.
128 bit in in the i128 type refers to the size of the data
which is stored at the location
answered 8 hours ago
erkandemerkandem
971 silver badge5 bronze badges
971 silver badge5 bronze badges
3
Okay, so how would one divide this number by 2, for example? 64-bit computers can only divide 64-, 32- and 16-bit numbers, if I'm not mistaken
– ForceBru
8 hours ago
1
@ForceBru There isn't any particular reason why a 32 or 64 bit system couldn't implement 128 bit addition in a single instruction. In fact, many architectures support it in a limited way - e.g. producing a 128 bit result from a 64 bit operation. See stackoverflow.com/a/34239917/493729.
– Peter Hall
6 hours ago
add a comment |
3
Okay, so how would one divide this number by 2, for example? 64-bit computers can only divide 64-, 32- and 16-bit numbers, if I'm not mistaken
– ForceBru
8 hours ago
1
@ForceBru There isn't any particular reason why a 32 or 64 bit system couldn't implement 128 bit addition in a single instruction. In fact, many architectures support it in a limited way - e.g. producing a 128 bit result from a 64 bit operation. See stackoverflow.com/a/34239917/493729.
– Peter Hall
6 hours ago
3
3
Okay, so how would one divide this number by 2, for example? 64-bit computers can only divide 64-, 32- and 16-bit numbers, if I'm not mistaken
– ForceBru
8 hours ago
Okay, so how would one divide this number by 2, for example? 64-bit computers can only divide 64-, 32- and 16-bit numbers, if I'm not mistaken
– ForceBru
8 hours ago
1
1
@ForceBru There isn't any particular reason why a 32 or 64 bit system couldn't implement 128 bit addition in a single instruction. In fact, many architectures support it in a limited way - e.g. producing a 128 bit result from a 64 bit operation. See stackoverflow.com/a/34239917/493729.
– Peter Hall
6 hours ago
@ForceBru There isn't any particular reason why a 32 or 64 bit system couldn't implement 128 bit addition in a single instruction. In fact, many architectures support it in a limited way - e.g. producing a 128 bit result from a 64 bit operation. See stackoverflow.com/a/34239917/493729.
– Peter Hall
6 hours ago
add a comment |
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