Mfcttrf

In an answer by user RichF, it is claimed that the previous-address-space moves were able to access 'all of memory' without memory management being enabled.

The instructions MFPI (move from previous instruction space), MFPD (… previous data space), MTPI (move to previous instruction space), MTPD (… previous data space) facilitate implementation of OS kernel services; user space and kernel space are usually non-overlapping so the kernel can't immediately see user space. Memory management generally uses the current-mode (kernel/super/user) field from the processor status (PSW) to determine which map to use; these instructions use the previous-mode field instead.

I've never really thought about what the previous-mode moves would do if the MMU was not enabled. The answer I linked to above says that the previous-mode bits from the PSW are used directly as the high-order 2 bits of the 18-bit bus address (the low 16 bits are provided via the usual operand).

I've poked around the manuals I have at home, and on bitsavers, but I can't see any mention of this usage. The instruction definitions all assume the MMU is enabled. E.g., for MFPD (from the 11/70 handbook, even though it says 11/45 in the text):

This instruction is provided in order to allow interaddress space
communication when the PDP-11/45 is using the Memory Management unit.

The address of the source operand is determined in the current address
space. That is, the address is determined using the SP and memory
pages determined by PS<15:14>. The address itself is then used in the
previous D space (as determined by PS<13:12> to get the source
operand. This operand is then pushed on to the current R6 stack.

OH, I'm supposed to have an actual question? OK: does anyone have documentation or actual experience to say what these 4 instructions do when memory management is not enabled? Was this 'off-label' use model-specific?

Dave, I'm not sure how it worked on every PDP-family chip. What I can tell you for certain is that, on an LSI-11/73 and Q-Bus, the MFP? and MTP? instructions did allow random access to any word in the 18-bit address space. No MMU need be involved.

Description of MFPD from the PDP-11 Architecture Handbook (c) 1983:

Pushes a word onto the current R6 stack from an address in previous space determined by PS <13:12>. The source address is computed using the current registers and memory map. When MFPI is executed and both previous mode and current mode are User, the instruction functions as thought it were MFPD.

MTPD is similar but not exactly parallel:

This instruction pops a word off the current R6 stack determined by PS bits <15:14> and stores that word into an address in previous space as determined by PS bits <13:12>. The destination address is computed using the current registers and memory map.

I never thought about it before, but if the MMU were not active, the current memory map would be the flat, actual, contiguous 18-bit address bus. An MMU would likely allow kinds of fragmented mapping, but I didn't want that.

background

from memory, about 40 years ago: The OS was Forth, and I was programming in Forth and Forth's embedded assembler. I did not want to calculate a 15-bit HSI (Hue, Saturation, Intensity) to RGB (Red, Green, Blue) for every pixel on the fly. Instead, as the program started, it would load three, pre-calculated, static 64kb LUTs (R, G, and B). Then, as needed, the color transform would simply be direct look-ups using the same HSI index for the 3 pixel colors. IIRC, the color DAC received 8-bit values, so only the low-order byte was used for each component.